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<ArticleSet>
<Article>
<Journal>
				<PublisherName>Semnan University Press</PublisherName>
				<JournalTitle>Journal of Modeling and Simulation in Electrical and Electronics Engineering</JournalTitle>
				<Issn>2821-0786</Issn>
				<Volume>6</Volume>
				<Issue>2</Issue>
				<PubDate PubStatus="epublish">
					<Year>2026</Year>
					<Month>06</Month>
					<Day>01</Day>
				</PubDate>
			</Journal>
<ArticleTitle>Modeling of the LDMOSFET Transistor with P-Type Windows Based on the BSIM6 Model</ArticleTitle>
<VernacularTitle></VernacularTitle>
			<FirstPage>55</FirstPage>
			<LastPage>60</LastPage>
			<ELocationID EIdType="pii">10597</ELocationID>
			
<ELocationID EIdType="doi">10.22075/mseee.2026.40209.1245</ELocationID>
			
			<Language>EN</Language>
<AuthorList>
<Author>
					<FirstName>Ali</FirstName>
					<LastName>Shokouhi Shoormasti</LastName>
<Affiliation>Electrical and Computer Engineering Department, Semnan University, Semnan, Iran</Affiliation>

</Author>
<Author>
					<FirstName>Abdollah</FirstName>
					<LastName>Abbasi</LastName>
<Affiliation>Electrical and Computer Engineering Department, Semnan University, Semnan, Iran.</Affiliation>

</Author>
<Author>
					<FirstName>Ali Asghar</FirstName>
					<LastName>Orouji</LastName>
<Affiliation>Electrical and Computer Engineering Department, Semnan University, Semnan, Iran</Affiliation>

</Author>
</AuthorList>
				<PublicationType>Journal Article</PublicationType>
			<History>
				<PubDate PubStatus="received">
					<Year>2025</Year>
					<Month>12</Month>
					<Day>30</Day>
				</PubDate>
			</History>
		<Abstract>A physics-based circuit model is presented for a P+ window lateral double-diffused MOSFET (PW-LDMOSFET) structure intended for high-voltage circuit applications. The device employs p-type windows underneath the drift region to reshape the electric field to improve the breakdown voltage. In the proposed model, the PW-LDMOSFET structure is partitioned into two main parts: First, an intrinsic MOSFET modeled by the BSIM6 compact model and second, a voltage-controlled resistor network that represents the segmented drift region. The drift region is divided into six regions, and closed-form analytical expressions are derived for each segment, explicitly accounting for the influence of the depletion effect of P-N junctions on the effective conduction thickness. To verify the proposed model, the PW-LDMOSFET structure is simulated and analyzed using the SILVACO-ATLAS two-dimensional device simulator, including several physical models, and the results are then compared with the proposed model implemented in SILVACO-SmartSpice. Comparisons between the results demonstrate accurate prediction of the drain current characteristics and the dependence of on-resistance on gate voltage and doping concentration of the drift region for gate biases above threshold. Due to the modular formulation of the proposed model, it can be extended to other LDMOSFET structures that use p-type windows.</Abstract>
		<ObjectList>
			<Object Type="keyword">
			<Param Name="value">BSIM6</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">circuit model</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">LDMOSFET</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">On-Resistance</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">Silvaco</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">Voltage-Controlled Resistor (VCR)</Param>
			</Object>
		</ObjectList>
<ArchiveCopySource DocType="pdf">https://mseee.semnan.ac.ir/article_10597_61e6e46e54d87abbbe49fd549c5f9aa3.pdf</ArchiveCopySource>
</Article>
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