Journal of Modeling and Simulation in Electrical and Electronics Engineering

Journal of Modeling and Simulation in Electrical and Electronics Engineering

A Highly Efficient Nanoscale Demultiplexer Architecture based on Quantum-Dot Cellular Automata

Document Type : Research Article

Authors
Hamidreza Ghaemi Peykani
Morteza Dorrigiv
Mohamad Danaie
Faculty of Electrical and Computer Engineering, Semnan University, Semnan, Iran.
10.22075/mseee.2025.37506.1206
Abstract
This paper presents the design of a demultiplexer (DMUX) structure using Quantum-dot Cellular Automata (QCA) technology. A demultiplexer is a fundamental circuit that receives information from a single input line and routes it to one of several output lines, with the selected output determined by the control inputs. Widely employed in communication systems, demultiplexers enable the transformation of serial data streams into parallel outputs. In this work, an optimized architecture for a 1:2 QCA demultiplexer is proposed, characterized by simplicity, efficiency, and reliability, with the added capability of implementing a wide range of logical functions. Furthermore, a novel 1:4 QCA demultiplexer is developed based on the proposed structure, eliminating the need for coplanar cells or crossover wires. Simulation results confirm the superior performance of the proposed architectures in terms of reduced cell count, area, and latency. Specifically, the 1:2 design requires only 17 QCA cells, occupies 0.01 μm², and exhibits a delay of 0.25 clock cycles, while the 1:4 demultiplexer requires 74 QCA cells, occupies 0.07 μm², and achieves a delay of 3 clock cycles.
Keywords
Demultiplexer
Majority voter
Quantum-dot Cellular Automata
Crossover
Coplanar
Subjects
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  • Receive Date 23 April 2025
  • Revise Date 26 September 2025
  • Accept Date 14 October 2025